The Relatively Simple CPU simulator is an instructional aid for teaching microprocessor design.  It allows the user to simulate the flow of data within this CPU as it fetches, decodes, and executes instructions.  It uses animation to illustrate the flow of data between components, and highlights asserted control signals within the CPU.  The user can simulate this CPU with a hard-wired control unit or a microcoded control unit.

The Relatively Simple CPU can access 64K bytes of memory, each byte being 8 bits wide. The CPU does this by outputting a 16-bit address on its output pins A[15..0] and reading in the 8-bit value from memory on its inputs D[7..0].  This CPU has two programmer-accessible registers: an 8-bit accumulator labeled AC, and an 8-bit general purpose register R.  It also has a 1-bit zero flag, Z. It has sixteen instructions in its instruction set, as shown below.

Instruction

Instruction Code

Operation

NOP

0000 0000

No operation

LDAC

0000 0001

AC = M[ ]

STAC

0000 0010

M[ ] = AC

MVAC

0000 0011

R = AC

MOVR

0000 0100

AC = R

JUMP

0000 0101

Goto

JMPZ

0000 0110

IF (Z=1) THEN Goto

JPNZ

0000 0111

IF (Z=0) THEN Goto

ADD

0000 1000

AC = AC + R, If (AC + R = 0) Then Z = 1 Else Z = 0

SUB

0000 1001

AC = AC - R, If (AC - R = 0) Then Z = 1 Else Z = 0

INAC

0000 1010

AC = AC + 1, If (AC + 1 = 0) Then Z = 1 Else Z = 0

CLAC

0000 1011

AC = 0, Z = 1

AND

0000 1100

AC = AC ^ R, If (AC ^ R = 0) Then Z = 1 Else Z = 0

OR

0000 1101

AC = AC R, If (AC R = 0) Then Z = 1 Else Z = 0

XOR

0000 1110

AC = AC R, If (AC R = 0) Then Z = 1 Else Z = 0

NOT

0000 1111

AC = AC¢, If (AC¢ = 0) Then Z = 1 Else Z = 0

Chapters 3, 6, and 7 of Computer Systems Organization and Architecture show how this CPU was designed in detail.

Click here for a video tour of the simulator (requires the Macromedia Shockwave Player, available at www.macromedia.com).

Screenshots:

Main Interface:

The view of the Register Section: